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Book
3-Dimensional VLSI : A 2.5-Dimensional Integration Scheme
Authors: ---
ISBN: 3642041566 9786612982095 3642041574 1282982095 Year: 2010 Publisher: Berlin, Heidelberg : Springer Berlin Heidelberg : Imprint: Springer,

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"3-Dimensional VLSI: A 2.5-Dimensional Integration Scheme"elaborates the concept and importance of 3-Dimensional (3-D) VLSI. The authors have developed a new 3-D IC integration paradigm, so-called 2.5-D integration, to address many problems that are hard to resolve using traditional non-monolithic integration schemes. The book also introduces major 3-D VLSI design issues that need to be solved by IC designers and Electronic Design Automation (EDA) developers. By treating 3-D integration in an integrated framework, the book provides important insights for semiconductor process engineers, IC designers, and those working in EDA R&D. Dr. Yangdong Deng is an associate professor at the Institute of Microelectronics, Tsinghua University, China. Dr. Wojciech P. Maly is the U. A. and Helen Whitaker Professor at the Department of Electrical and Computer Engineering, Carnegie Mellon University, USA.


Book
Formal verification : an essential toolkit for modern VLSI design
Authors: --- --- ---
ISBN: 0128008156 0128007273 9780128008157 9780128007273 Year: 2015 Publisher: Amsterdam, [Netherlands] : Morgan Kaufmann,

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Formal Verification: An Essential Toolkit for Modern VLSI Design presents practical approaches for design and validation, with hands-on advice for working engineers integrating these techniques into their work. Building on a basic knowledge of System Verilog, this book demystifies FV and presents the practical applications that are bringing it into mainstream design and validation processes at Intel and other companies. The text prepares readers to effectively introduce FV in their organization and deploy FV techniques to increase design and validation productivity. Presents formal verific


Book
Low Power Design Essentials
Author:
ISBN: 0387717129 9786612126536 1282126539 0387717137 Year: 2009 Publisher: New York, NY : Springer US : Imprint: Springer,

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Low Power Design Essentials is the first book at the graduate level to address the design of low power digital integrated circuits in an orderly and logical fashion. As such, this book will be of interest to students as well as professionals. In addition to taking an educational approach towards low-power design, the book also presents an integrated methodology to address power at all layers of the design hierarchy. Finally, the text also explains the main roadblocks as well as the physical limits in further energy scaling. This book is based on the extensive amount of teaching the author has carried out both at universities and companies worldwide. All chapters have been drawn up specifically for self-study. Different levels of understanding are included within each chapter. All chapters begin with elementary material and almost all contain advanced material. A unique format is used for this book. Rather than the traditional approach of a lengthy continuous text interspersed with some figures, it uses the reverse approach of dominant graphics with accompanying supplemental text. It is understood that a single figure does a lot more to convey a message than a page of text. It is hoped that this innovative format provides a better structure for learning the essential topics in low power design. About the Author Jan Rabaey received his Ph.D degree in Applied Sciences from the Katholieke Universiteit Leuven, Belgium. From 1983-1985, he was connected to the UC Berkeley as a Visiting Research Engineer. From 1985-1987, he was a research manager at IMEC, Belgium, and in 1987, he joined the faculty of the Electrical Engineering and Computer Science department of the University of California, Berkeley, where he is now holds the Donald O. Pederson Distinguished Professorship. He is currently the scientific co-director of the Berkeley Wireless Research Center (BWRC), as well as the director of the FCRP-sponsored GigaScale Systems Research Center (GSRC). He is an IEEE Fellow.


Book
Clocking in Modern VLSI Systems
Author:
ISBN: 1441902783 9786612362361 1441902600 1282362364 1441902619 Year: 2009 Publisher: New York, NY : Springer US : Imprint: Springer,

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Clocking in Modern VLSI Systems covers a wide range of subjects related to microprocessor clocking including distribution, flop design, inductive techniques, phase noise and jitter, delay lock techniques, resiliency and other techniques to address process variation and physical design aspects. The book contains rigorous analytical treatment for a number of important topics such as timing uncertainty due statistical spatial and temporal phenomena, metastability, jitter in the time and frequency domain and supply-induced clock noise. It also contains a large number of design examples and case studies, background information, a complete list of references and a number of advanced topics. The subjects covered reflect to a large extent the collective interests and foci of both industry and academia with respect to clocking. It is very up-to-date and co-authored by a panel of industry experts involved in clock design in major processor chips. Clocking in Modern VLSI Systems is authored from a strong design perspective and will help readers interested in clock design obtain the necessary background information and tools for such a task. The book also captures design trends that have appeared over the last few years and provides a comprehensive list of references for further study.


Book
On and Off-Chip Crosstalk Avoidance in VLSI Design
Authors: ---
ISBN: 144190946X 1441909486 9786612837661 1489983279 1441909478 1282837664 Year: 2010 Publisher: New York, NY : Springer US : Imprint: Springer,

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On- and Off-Chip Crosstalk Avoidance in VLSI Design Chunjie Duan, Brock J. LaMeres and Sunil P. Khatri Deep Submicron (DSM) processes present many challenges to Very Large Scale Integration (VLSI) circuit designers. One of the greatest challenges is inter-wire crosstalk within on- and off-chip bus traces. Capacitive crosstalk in on-chip busses becomes significant with shrinking feature sizes of VLSI fabrication processes, while inductive cross-talk becomes a problem for busses with high off-chip data transfer rates. The presence of crosstalk greatly limits the speed and increases the power consumption of an IC design. This book presents approaches to avoid crosstalk in both on-chip as well as off-chip busses. These approaches allow the user to trade off the degree of crosstalk mitigation against the associated implementation overheads. In this way, a continuum of techniques is presented, which help improve the speed and power consumption of the bus interconnect. These techniques encode data before transmission over the bus to avoid certain undesirable crosstalk conditions and thereby improve the bus speed and/or energy consumption. In particular, this book: Presents novel ways to combine chip and package design, reducing off-chip crosstalk so that VLSI systems can be designed to operate significantly faster; Provides a comprehensive set of bus crosstalk cancellation techniques, both memoryless and memory-based; Provides techniques to design extremely efficient CODECs for crosstalk cancellation; Provides crosstalk cancellation approaches for multi-valued busses; Offers a battery of approaches for a VLSI designer to use, depending on the amount of crosstalk their design can tolerate, and the amount of area overhead they can afford.


Book
Analysis and Design of Resilient VLSI Circuits : Mitigating Soft Errors and Process Variations
Authors: ---
ISBN: 1441909303 144190932X 1282836811 1441909311 9786612836817 1489985107 Year: 2010 Publisher: New York, NY : Springer US : Imprint: Springer,

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This book is motivated by the challenges faced in designing reliable integratedsystems using modern VLSI processes. The reliable operation of Integrated Circuits (ICs) has become increasingly difficult to achieve in the deep sub-micron (DSM) era. With continuously decreasing device feature sizes, combined with lower supply voltages and higher operating frequencies, the noise immunity of VLSI circuits is decreasing alarmingly. Thus, VLSI circuits are becoming more vulnerable to noise effects such as crosstalk, power supply variations and radiation-induced soft errors. This book describes the design of resilient VLSI circuits. It presents algorithms to analyze the detrimental effects of radiation particle strikes and processing variations on the electrical behavior of VLSI circuits, as well as circuit design techniques to mitigate the impact of these problems. Describes the state of the art in the areas of radiation tolerant circuit design and process variation tolerant circuit design; Presents analytical approaches to test efficiently the severity of electrical effects of radiation/process variations, as well as techniques to minimize the effects due to these two problems; Distills content oriented toward nuclear engineers into leading-edge algorithms and techniques that can be understood easily and applied by VLSI designers.


Book
VLSI Design for Video Coding : H.264/AVC Encoding from Standard Specification to Chip
Authors: --- --- ---
ISBN: 1441909583 1441909605 1441909591 1282838180 9786612838187 1489983821 Year: 2010 Publisher: New York, NY : Springer US : Imprint: Springer,

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Back Cover Copy VLSI Design for Video Coding By: Youn-Long Lin Chao-Yang Kao Jian-Wen Chen Hung-Chih Kuo High definition video requires substantial compression in order to be transmitted or stored economically. Advances in video coding standards from MPEG-1, MPEG-2, MPEG-4 to H.264/AVC have provided ever increasing coding efficiency, at the expense of great computational complexity which can only be delivered through massively parallel processing. This book presents VLSI architectural design and chip implementation for high definition H.264/AVC video encoding with a complete FPGA prototype. It serves as an invaluable reference for anyone interested in VLSI design for video coding. • Presents state-of-the-art VLSI architectural design and chip implementation for high definition H.264/AVC video encoding; • Employs massively parallel processing to deliver 1080pHD, with efficient design that can be prototyped via FPGA; • Every subsystem is presented from standard specification, algorithmic description, design considerations, timing planning, block diagram to test-bench verification;.


Book
Handbook of Signal Processing Systems
Authors: --- --- ---
ISBN: 1441963448 1441963456 Year: 2010 Publisher: New York, NY : Springer US : Imprint: Springer,

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Handbook of Signal Processing Systems is organized in four parts. The first part motivates representative applications that drive and apply state-of-the art methods for design and implementation of signal processing systems; the second part discusses architectures for implementing these applications; the third part focuses on compilers and simulation tools; and the fourth part describes models of computation and their associated design tools and methodologies. This handbook provides: A comprehensive overview of signal processing systems Standalone, complete reference to signal processing systems A comprehensive index for ease of use An extensive bibliography for further reading This handbook is essential for those involved in R&D in the design, architecture, and implementation of a wide array of signal processing systems. This handbook is also suitable as a first point of entry to the field for undergraduate and post-graduate students in engineering, computer sciences, and system engineering.

Keywords

Integrated circuits -- Very large scale integration -- Handbooks, manuals, etc. --- Integrated circuits -- Very large scale integration. --- Signal processing -- Digital techniques -- Handbooks, manuals, etc. --- Signal processing -- Digital techniques. --- Signal processing --- Engineering & Applied Sciences --- Electrical & Computer Engineering --- Applied Physics --- Telecommunications --- Electrical Engineering --- Processing, Signal --- Engineering. --- Computer organization. --- Microprocessors. --- Data structures (Computer science). --- Electrical engineering. --- Signal, Image and Speech Processing. --- Data Structures. --- Communications Engineering, Networks. --- Computer Systems Organization and Communication Networks. --- Processor Architectures. --- Information measurement --- Signal theory (Telecommunication) --- Data structures (Computer scienc. --- Telecommunication. --- Computer network architectures. --- Computer science. --- Informatics --- Science --- Architectures, Computer network --- Network architectures, Computer --- Computer architecture --- Electric communication --- Mass communication --- Telecom --- Telecommunication industry --- Communication --- Information theory --- Telecommuting --- Signal processing. --- Image processing. --- Speech processing systems. --- Minicomputers --- Organization, Computer --- Electronic digital computers --- Electric engineering --- Engineering --- Information structures (Computer science) --- Structures, Data (Computer science) --- Structures, Information (Computer science) --- Electronic data processing --- File organization (Computer science) --- Abstract data types (Computer science) --- Computational linguistics --- Electronic systems --- Modulation theory --- Oral communication --- Speech --- Telecommunication --- Singing voice synthesizers --- Pictorial data processing --- Picture processing --- Processing, Image --- Imaging systems --- Optical data processing


Book
Embedded Memories for Nano-Scale VLSIs
Author:
ISBN: 1441946942 0387884963 9786612126901 1282126903 0387884971 Year: 2009 Publisher: New York, NY : Springer US : Imprint: Springer,

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Embedded Memories for Nano-Scale VLSIs provides a comprehensive and in-depth view on the state-of-the-art embedded memory technologies. The material covers key technology attributes and advanced design techniques in nano-scale VLSI design. It also discusses how to make decisions concerning the right design tradeoffs in real product development. This book first provides an overview on the landscape and trend of embedded memory in various VLSI system designs, including high-performance microprocessor, low-power mobile handheld devices, micro-controllers, and various consumer electronics. It then shows an in-depth view on each different type of embedded memory technology, including high-speed SRAM, ultra-low-voltage and alternative SRAM, embedded DRAM, embedded nonvolatile memory, and emerging or so-called "universal" memories such as FeRAM and MRAM. Each topic includes coverage of the key technology attributes from a product application perspective, ranging from technology scaling challenges to advanced circuit techniques for achieving optimal design tradeoff in performance and power. VLSI systems are becoming increasingly dependent on on-die memory to provide adequate memory bandwidth for various applications and this book gives readers a broader view of this important field to help them to achieve their optimal design goals for different applications. Embedded Memories for Nano-Scale VLSIs is a valuable reference for engineers and academics in the field.

Keywords

Embedded computer systems. --- Integrated circuits -- Very large scale integration. --- Nanotechnology. --- Integrated circuits --- Embedded computer systems --- Nanotechnology --- Electrical & Computer Engineering --- Engineering & Applied Sciences --- Electrical Engineering --- Very large scale integration --- Very large scale integration. --- Molecular technology --- Nanoscale technology --- Embedded systems (Computer systems) --- Very large scale integration of circuits --- VLSI circuits --- Engineering. --- Computer hardware. --- Computer memory systems. --- Electrical engineering. --- Electronics. --- Microelectronics. --- Electronic circuits. --- Circuits and Systems. --- Electronics and Microelectronics, Instrumentation. --- Memory Structures. --- Computer Hardware. --- Electrical Engineering. --- High technology --- Computer systems --- Architecture Analysis and Design Language --- Systems engineering. --- Memory management (Computer scie. --- Computer engineering. --- Computers --- Electrical engineering --- Physical sciences --- Engineering systems --- System engineering --- Engineering --- Industrial engineering --- System analysis --- Design and construction --- Electric engineering --- Computer memory systems --- Electronic digital computers --- Storage devices, Computer --- Computer input-output equipment --- Memory management (Computer science) --- Microminiature electronic equipment --- Microminiaturization (Electronics) --- Electronics --- Microtechnology --- Semiconductors --- Miniature electronic equipment --- Electron-tube circuits --- Electric circuits --- Electron tubes --- Memory systems --- Storage devices


Book
Unleash the System On Chip using FPGAs and Handel C
Authors: --- ---
ISBN: 9048181119 1402093616 9786612036248 1282036246 1402093624 Year: 2009 Publisher: Dordrecht : Springer Netherlands : Imprint: Springer,

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The last two decades have witnessed the overhauling growth in microelectronics and it has emerged as a major new technological force shaping our everyday lives. Apart from the ubiquitous penetration in the social life, the microelectronics is going though a paradigm shift from the VLSI to personal computers, mobile devices and finally converging to single-chip solutions embedded with the intelligence in both hardware and software form. It is undisputed fact that the System-on-a-chip (SoC) is revitalizing the design of integrated circuits due to the unprecedented levels of integration possible and has become the pervasive next generation revolution in microelectronics and Chip Design. The proliferation of ‘SoC’ have made most of the prognosticators to bet that it is going to sustain and thrive the accelerated growth in the semiconductor market. However, the designers are agonized about the resuscitation of the Moore’s law that has delivered consistently since about 1975, inspite of changing the design perceptions from transistors to IP cores, functional and structural diversification which is popularly known as “More than Moore”. In nutshell, the ‘Halcyon Days’ enjoyed by the VLSI industry are behind us and there is constant quest for development of affluent design methodologies for addressing the narrow market windows and accelerated obsolescence cycles that naturally impose reduced development times for the devices in the new era belonging to SoCs. Unleash the System On Chip using FPGAs and Handel C is an attempt to empower the design community by delivering the ‘know-how’ developed by the authors through their vast development experience in the areas of ‘VLSI Design’, Embedded Systems, ‘Hardware Software Co-Design’, ‘Reconfigurable System Design’ and ‘Network On Chip Design’. The book effectively showcases building the SoC from ‘Concept to Product’. With the founding conception that the future SoC designer is today’s software designer, the book laid emphasis on ‘C’ based methodology which is considered at a much higher level of abstraction. The emerging ‘hardware-software functional alloy’ perception of the SoCs is comprehended by leveraging the bottom up (i.e. design reuse) approach by edifying with the soft IP cores developed in Handel C which is also the pragmatic approach to bridge the gap between productivity, yield, quality, specifications (temporal and spatial), verification and prototyping. The hard design process of SoC is exemplified by a synergic approach of combining the flexibility and performance of FPGAs with the rich set of available soft IP cores developed in Handel C. More complex design approaches such as ‘partial reconfiguration’, ‘concurrent hardware software SoC realization’ are addressed by using the Xilinx EDK toolset. With the growing trend of SoC designer becoming the ‘network engineer’ and vice versa, few case studies have devoted towards building the ‘Network on Chip (NoC)’. System optimization and quick verification is dealt in this book by adopting co-simulation and third party tool integration such as ModelSim. Other diversified, still interesting SoC case studies that will definitely help the designers in building intelligent chips are fuzzy logic controllers, code converters, arithmetic on chip etc. Control system SoCs are realized in this book by using the Soft IP processor cores such as ‘picoblaze’. This will definitely open a window for the Embedded Developers pursuing their one chip design endeavors. The complicated concepts such as design flow with respect to the Handel C, EDK etc. are simplified by giving actual screenshots and step by step approach, so that a mere walk though them will give a “Hands-On’ approach. Finally through 35 working Handel C cores, seven chapters and 128 references chosen from the selected white papers, research papers and WEB URLs will definitely empower the SoC veteran as well as beginner in not only getting acquainted with the innovative design methodologies of building the SoCs, but also opens a new door of research and development and infinite set of futures in this ever-growing enabling technology of this century. .

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