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2005 (14)

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2005 IEEE International Integrated Reliability Workshop final report : Stanford Sierra Conference Center, S. Lake Tahoe, California, October 17-20, 2005
Authors: --- ---
ISBN: 0780389921 1509097732 Year: 2005 Publisher: [Place of publication not identified] IEEE Electron Devices Society

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Millimeter-wave integrated circuits
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ISBN: 1280147822 9786610147823 038723666X 0387236651 1441936491 Year: 2005 Publisher: New York : Springer,

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With the ever-increasing demand on wireless spectrum by wide bandwidth applications, such as third-generation mobile phones at RF frequencies, Multipoint Video Distribution System (MVDS) and Local Multipoint Distribution System (LMDS) in the millimeter-wave frequency range, there is a growing need to exploit higher and higher frequencies. The mm-wave field has therefore become a rapidly emerging area of research. Millimeter-Wave Integrated Circuits explores the design and implementation of mm-wave integrated circuits using MMIC (Monolithic Microwave Integrated Circuit) technology. The main focal points are, firstly, fundamental circuit analyzes of building blocks necessary for the employment of MMIC technology for mm-wavelength applications, and, secondly, circuit design methodologies associated with these building blocks. The analytical/theoretical treatment is supplemented by specific mm-wave MMIC designs of varied complexity. The circuit designs presented have been fabricated on a commercial 0.25 m m GaAs pHEMT foundry process, thereby demonstrating that high volume, high quality mm-wave MMICs can indeed become a commercial reality. Millimeter-Wave Integrated Circuits has a broad scope, and includes detailed discussions on high frequency materials and technologies, high frequency devices and the design of high frequency circuits, giving the reader a good theoretical and practical understanding of mm-wave circuit design. Key components of mm-waves transceiver circuits are studied and evaluated. Practical MMIC realizations, targeted for transceiver applications operating near 40 GHz and 57 GHz, have been fabricated and tested. They include low noise amplifiers (LNAs), balanced diode mixer for both up and down-conversion, balanced HEMT mixer as down-converter, HEMT frequency doubler, HEMT frequency tripler and a 57 GHz transceiver using integrated building blocks. Furthermore the viability of state of the art mm-wave processes for the generation of high power levels at 100 GHz is analyzed and a design topology suitable for a practical realization is presented. Millimeter-Wave Integrated Circuits is written to support and supplement university mm-wave and high-frequency IC design courses, as well as serving as a reference for researchers and professional high frequency design engineers working in this exciting field of mm-wave integrated circuits.

High-linearity CMOS RF front-end circuits
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ISBN: 128046061X 9786610460618 0387238026 0387238018 1441936637 Year: 2005 Publisher: New York : Springer,

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The rapidly growing wireless communication industry is increasingly demanding CMOS RF ICs due to their lower costs and higher integration levels. The RF front-end of such wireless systems often needs to handle widely disparate signal levels: small desired signals and large interferers. Therefore, it becomes necessary to have highly linear circuits to increase the system dynamic range. However, traditional CMOS circuit designs are usually limited in either their speed or in their linear performance. New techniques are needed to meet the demand for high linearity at radio frequencies. High-Linearity CMOS RF Front-End Circuits presents some unique techniques to enhance the linearity of both the receiver and transmitter. For example, using harmonic cancellation techniques, the linearity of the receiver front-end can be increased by few tens of dB with only minimal impact on the other circuit parameters. The new parallel class A&B power amplifier can not only increase the transmitter's output power in the linear range, but can also result in significant savings in power consumption. High-Linearity CMOS RF Front-End Circuits can be used as a textbook for graduate courses in RF CMOS design and will also be useful as a reference for the practicing engineer.

Proceedings of the 12th International Symposium on the Physical & Failure Analysis of Integrated Circuits : IPFA 2005 : [27 June to 1 July 2005, Shangri-La's rasa Sentosa Resort, Singapore
Authors: --- --- ---
ISBN: 1538602539 0780393015 Year: 2005 Publisher: [Place of publication not identified] IEEE

ASIC and FPGA verification : a guide to component modeling
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ISBN: 1281008281 9786611008284 0080475922 0125105819 1417549718 9781417549719 9780125105811 9780080475929 Year: 2005 Publisher: San Francisco, CA : Oxford : Morgan Kaufmann ; Elsevier,

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Richard Munden demonstrates how to create and use simulation models for verifying ASIC and FPGA designs and board-level designs that use off-the-shelf digital components. Based on the VHDL/VITAL standard, these models include timing constraints and propagation delays that are required for accurate verification of today's digital designs. ASIC and FPGA Verification: A Guide to Component Modeling expertly illustrates how ASICs and FPGAs can be verified in the larger context of a board or a system. It is a valuable resource for any designer who simulates multi-chip digital designs.

Symbolic analysis and reduction of VLSI circuits
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ISBN: 1280612053 9786610612055 0387239057 0387239049 1441936718 Year: 2005 Publisher: New York, N.Y. : Springer,

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The IC industry, including digital and analog circuit design houses, electrical design automation software vendors, library and IP providers, and foundries all face grand challenges in designing nanometer VLSI systems. The design productivity gap between nanometer VLSI technologies and today’s design capabilities mainly comes from the exponentially growing complexity of VLSI systems due to relentless pushing for integration. The physical effects on the performance and reliability of these systems are becoming more pronounced. Efficient modeling and reduction of both the passive and active circuits is essential for hierarchical and IP-based reuse design paradigms. Symbolic Analysis and Reducation of VLSI Circuits presents the symbolic approach to the modeling and reduction of both the passive parasitic linear networks and active analog circuits. It reviews classic symbolic analysis methods and presents state-of-art developments for interconnect reduction and the behavioral modeling of active analog circuits. The text includes the most updated discoveries such as Y-Delta transformation and DDD-graph symbolic representation which allow analysis and modeling of much larger circuitry than ever before.

2005 International Conference on Integrated Circuit Design and Technology : ICICDT : Austin, Texas, May 9-11, 2005
Authors: --- ---
ISBN: 0780390814 1509099719 Year: 2005 Publisher: [Place of publication not identified] Institute of Electrical and Electronics Engineers


Book
6th International Symposium on Quality Electronic Design : proceedings : March 21-23, 2005, San Jose, California
Authors: ---
ISBN: 0769523013 1538600676 Year: 2005 Publisher: [Place of publication not identified] IEEE Computer Society


Book
DBT 2005 : proceedings, 2005 IEEE International Workshop on Current and Defect Based Testing, 2005 : 1 May 2005.
Author:
ISBN: 1424400341 153860065X Year: 2005 Publisher: New York : IEEE,

2005 IEEE radiation effects data workshop : NSREC 2005 : workshop record : held in conjunction with the IEEE Nuclear and Space Radiation Effects Conference : Sheraton Seattle Hotel and Towers, 11-15 July 2005, Seattle, Washington
Authors: --- ---
ISBN: 0780393678 1509099697 Year: 2005 Publisher: [Place of publication not identified] Institute of Electrical and Electronics Engineers

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